Vlsi testing

VLSI FAULTS and TESTING
Presented by:-
Dilip Mathuria
M.Tech (VLSI)
2016008200
Yield and Reliability Engineering

VLSI Realization Process
 Customer’s need
 Determine requirements
 Write specifications
 Design synthesis and Verification
 Test development
 Fabrication
 Manufacturing test
 Chips to customer

VLSI Chip Yield
A manufacturing defect is a finite chip area with
electrically malfunctioning circuitry caused by errors in
the fabrication process
A chip with no manufacturing defect is called a good
chip
Fraction (or percentage) of good chips produced in a
manufacturing process is called the yield.
Yield is denoted by symbol Y

Why Model Faults
I/O function tests inadequate for manufacturing
(functionality versus component and
interconnection testing)
Real defects (often mechanical) too numerous and
often not analyzable
A fault model identifies targets for testing
A fault model makes analysis possible
Effectiveness measurable by experiments

Defect, Fault, and Error
Defect
A defect is the unintended difference between the implemented
hardware and its intended design.
Defects occur either during manufacture or during the use of
devices.
Fault
A representation of a defect at the abstracted function level.
Error
A wrong output signal produced by a defective system.
An error is caused by a Fault or a design error.

Typical Types of Defects
Extra and missing material
Primarily caused by dust particles on the mask or
wafer surface, or in the processing chemicals
Oxide breakdown
Primarily caused by insufficient oxygen at the interface of
silicon (Si) and silicon dioxide (SiO2), chemical contamination,
and crystal defects
Electromigration
Primarily caused by the transport of metal atoms when a
current flows through the wire

Defect Categories
Defect categories
Random defects, which are independent of designs and
processes
Systematic defects, which depend on designs and
processes used for manufacturing
For example, random defects might be caused by
random particles scattered on a wafer during
manufacturing

Logical Fault Models
Systematic defects might be caused by process
variations, signal integrity, and design integrity issues.
It is possible both random and systematic defects
could happen on a single die
Logical faults
Logical faults represent the physical defects on the
behaviors of the systems

Role of Testing
If you design a product, fabricate, and test it, and it fails the test,
then there must because for the failure.
 Test was wrong
 The fabrication process was faulty
 The design was incorrect
 The specification problem
The role of testing is to detect whether something went wrong
and the role of diagnosis is to determine exactly what went
wrong.
Correctness and effectiveness of testing is most important for
quality products.

Verification & Test
Verification
Verifies correctness of design
Performed by simulation, hardware emulation, or formal methods
Perform once before manufacturing
Responsible for quality of design
Test
Verifies correctness of manufactured hardware
Two-part process
Test generation: software process executed once during design
Test application: electrical tests applied to hardware
Test application performed on every manufactured device
Responsible for quality of device

Ideal Tests & Real Tests
The problems of ideal tests
Ideal tests detect all defects produced in the manufacturing process
Ideal tests pass all functionally good devices
Very large numbers and varieties of possible defects need to be
tested
Difficult to generate tests for some real defects
Real tests
Based on analyzable fault models, which may not map on real
defects
Incomplete coverage of modeled faults due to high complexity
Some good chips are rejected. The fraction (or percentage) of such
chips is called the yield loss
Some bad chips pass tests. The fraction (or percentage) of bad chips
among all passing chips is called the defect level

Testing Economics
Chips must be tested before they are assembled onto PCBs,
which, in turn, must be tested before they are assembled into
systems.
The rule of ten
If a chip fault is not detected by chip testing, then finding
the fault costs 10 times as much at the PCB level as at the
chip level.
Similarly, if a board fault is not found by PCB testing, then
finding the fault costs 10 times as much at the system level as
at the board level.

Types of Test
Characterization testing
Design debug or verification testing
Performed on a new design before it is sent to production
Verify whether the design is correct and the device will meet
all specifications
Functional tests and comprehensive AC and DC
measurements are made
A characterization test determines the exact limits of device
operation values
DC Parameter tests
Measure steady-state electrical characteristics
For example, threshold test

Types of Test
Production testing
Every fabricated chip is subjected to production tests
The test patterns may not cover all possible functions and
data patterns but must have a high fault coverage of
modeled faults
The main driver is cost, since every device must be tested.
Test time must be absolutely minimized
Only a go/no-go decision is made
Test whether some device-under-test parameters are met
to the device specifications under normal operating
conditions
Burn-In testing
Ensure reliability of tested devices by testing
Detect the devices with potential failures

Types of Test
The potential failures can be accelerated at elevated temperatures
The devices with infant mortality failures may be screened out by
a short-term burn-in test in an accelerate
Failure rate versus product lifetime (bathtub curve)

Test Process
The testing problem
Given a set of faults in the circuit under test (or
device under test), how do we obtain a certain (small)
number of test patterns which guarantees a certain
(high) fault coverage?
Test process
What faults to test? (fault modeling)
How are test pattern obtained? (test pattern
generation)
How is test quality (fault coverage) measured?
(fault simulation)?
How are test vectors applied and results evaluated?

Testing & Diagnosis
Testing is a process which includes test
pattern generation, test pattern application, and output
evaluation.
Fault detection tells whether a circuit is
fault-free or not
 Fault location provides the location of the
detected fault
Fault diagnosis provides the location and the
type of the detected fault

Fault Simulation
Fault simulation
In general, simulating a circuit in the presence of faults is
known as fault simulation
The main goals of fault simulation
Measuring the effectiveness of the test patterns
Guiding the test pattern generator program
Generating fault dictionaries
Outputs of fault simulation
Fault coverage - fraction (or percentage) of modeled faults
detected by test vectors
Set of undetected faults

Design for Testability
Definition
A fault is testable if there exists a well-specified procedure to
expose it, which is implementable with a reasonable cost using
current technologies. A circuit is testable with respect to a fault set
when each and every fault in this set is testable
Definition
Design for testability (DFT) refers to those design techniques that
make test generation and test application cost-effective
Electronic systems contain three types of components:
(a) digital logic,
(b) memory blocks, and
(c) analog or mixed-signal circuits

Introduction to Built-In Self-Test
Built-in self-test (BIST)
The capability of a circuit (chip/board/system) to test itself
Advantages of BIST
Test patterns generated on-chip -controllability Increased
Test can be on-line (concurrent) or off-line
Test can run at circuit speed, more realistic; shorter test time;
easier delay testing
External test equipment greatly simplified, or even totally
eliminated
Easily adopting to engineering changes

Benefits of Testing
Quality and economy are two major benefits of testing
The two attributes are greatly dependent and can not be defined
without the other
Quality means satisfying the user’s needs at a minimum cost
The purpose of testing is to weed out all bad products before they
reach the user
The number of bad products heavily affect the price of good
products
A profound understanding of the principles of manufacturing
and test is essential for an engineer to design a quality product

Vlsi testing

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