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MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 79
5.1 EMBEDDED SYSTEM
 An embedded system is a system has software embedded into computer-hardware, which makes a
system dedicated for an application (s) or specific part of an application or product or part of a
larger system.
Fig 1 embedded system architecture
1. Embeds h/w to give computer like functionalities
2. Embeds application s/w generally into ROM and it perform concurrent tasks.
3. Embeds a RTOS, which supervises the system
Functional Blocks
1. Central Processing Unit (CPU)
2. Memory (Read only memory and Random access memory)
3. Input Devices
4. Output Devices
5. Communication interfaces
6. Application specific circuitry
Fig 2 block diagram of embedded system
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 80
Classification of embedded system
Fig 3 embedded system classification
Based on functionality and performance requirements, embedded systems are classified as :
i. Stand-alone Embedded Systems
ii. Real-time Embedded Systems
iii. Networked Information Appliances
iv. Mobile Devices
i. Stand Alone Embedded Systems
 Work in stand-alone mode.
 They take inputs, process them and produce the desired output.
 Ex: mp3 players, digital cameras, video game consoles, microwave ovens and temperature
measurement systems..
ii. Real-time Embedded Systems
 Embedded systems in which some specific work has to be done in a specific time period are called
real-time systems.
 Two types Hard (with strict deadlines) and Soft
iii. Networked Information Appliances
 Embedded systems that are provided with network interfaces and accessed by networks such as
Local Area Network or the Internet are called networked information appliances.
iv. Mobile Devices
 Mobile devices such as mobile phones, Personal Digital Assistants (PDAs), smart phones etc are a
special category of embedded systems
Based on performance of the micro controller embedded systems are classified as
1. Small Scale Embedded Systems
 Are designed with a single 8 or 16-bit microcontroller, that may even be activated by a battery.
2. Medium Scale Embedded Systems
 With a single or 16 or 32 bit microcontroller, RISCs or DSPs.
 Have both hardware and software complexities.
3. Sophisticated Embedded Systems
 Sophisticated Embedded Systems
 have enormous hardware and software complexities,
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 81
Applications
1. Biomedical Instrumentation – ECG Recorder, Blood cell recorder, patient monitor system.
2. Communication systems – pagers, cellular phones,etc.
3. Peripheral controllers of a computer – Keyboard controller, Printer controller, LAN controller,
disk drive controller.
4. Industrial Instrumentation – Process controller, robotic systems etc.
5. Scientific – digital storage system, CRT display controller, spectrum analyzer.
Device Driver
 Device driver is a computer program those are integral components of operating systems.it allows
higher- level computer programs to interact with a hardware device.
 Each device driver handles
 one device type (e.g., mouse)
 one class of closely related devices.
Fig 4 device driver location
5.2 MICROCONTROLLERS
 Microcontrollers are small computing systems on a single chip.
 A microcontroller will also be referred to as an MCU.
 Central Processing Unit (CPU)
 Program memory
 Random Access Memory (RAM)
 EEPROM - Electrically Erasable Programmable Read Only Memory
 USARTs, Timer/Counters, ADC, DAC, I/O Ports.
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 82
Microprocessor vs Microcontroller
Applications of microcontrollers
 Automobile
 Aeronautics
 Space
 Rail Transport
 Mobile communications
 Industrial processing
 Remote sensing , Radio and Networking
 Robotics
 Consumer electronics , music players, Computer applications
 Security (e-commerce, smart cards)
 Medical electronics (hospital equipment, and mobile monitoring) and
 Defense application
5.3 8051
Features
 4K bytes internal ROM
 128 bytes internal RAM
 Four 8-bit I/O ports (P0 - P3).
 Two 16-bit timers/counters
 One serial interface
 64k external memory for code
 64k external memory for data
Fig 5 8051 block diagram
Microprocessor
 CPU is stand-alone, RAM, ROM,
I/O, timer are separate
 Designer can decide on the amount of
ROM, RAM and I/O ports.
 Expansive
 general-purpose
Microcontroller
 CPU, RAM, ROM, I/O and timer are all on a
single chip.
 fix amount of on-chip ROM, RAM, I/O ports
 For applications in which cost, power and
space are critical.
 single-purpose
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 83
Oscillator Circuit
 The oscillator circuit usually runs around 12MHz pulses generated by the crystal.
 The pulse is used to synchronize the system operation in a controlled pace.
 An 8051 machine cycle consists of 12 crystal pulses (clock cycle).
 Pins XTAL1 & XTAL2 have been used.
Internal Memory
 8051 implements a separate memory space for programs (code) and data.
 Internal memory consists of on-chip ROM and on-chip data RAM.
Internal RAM
 Internal data memory contains all the processor state
 Lower 128 bytes: registers, general data
 Upper 128 bytes:
 indirectly addressed: 128 bytes, used for the stack
 directly addressed: 128 bytes for “special” functions
Fig 6 8051 internal RAM
Registers
 Four Register Banks Each bank has R0-R7 .Selectable by psw.2,3
Fig 7 8051 register banks and bank selection
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 84
Special Function Registers
 8051 has 7 special function registers (SFRs) Some are both bit-addressable and byte addressable,
depending on the instruction accessing the register.
 They are:
1. Serial Port Data Buffer (SBUF)
2. Timer/Counter Control (TCON)
3. Timer/Counter Mode Control (TMOD)
4. Serial Port Control (SCON)
5. Power Control (PCON)
6. Interrupt Priority (IP)
7. Interrupt Enable Control (IE)
I/O Ports
 Four 8 bit bidirectional I/O ports. Each port has an 8-bit latch in the SFR space
 Each port also has an output drive and an input buffer.
 These ports can be used to general purpose I/O, as an address and data lines.
Port 0
 When there is no external memory present, this port acts as a general purpose input/output port.
 In the presence of external memory, it functions as a multiplexed address and data bus.
Port 1
 No dual functions.
 Is used for various interfacing activities.
 Is a normal I/O port .
Port 2
 This is an 8-bit port and performs dual functions.
 Similar to PORT P0, this port can be used as a general purpose port when there is no external
memory.
 When external memory is present it works in conjunction with PORT PO as an address bus.
Port 3
 behaves as a dedicated I/O port
 0 - RxD: serial input
 1 - TxD: serial output
 2 - INT0: external interrupt
 3 - INT1: external interrupt
 4 - T0: timer/counter 0 external input
 5 - T1: timer/counter 1 external input
 6 - WR: external data memory write strobe
 7 - RD: external data memory read strobe
Timers and Counters
 Two 16-bit registers that can be used as either timers or up counters are named T0 and T1.
 Each counter may be programmed to count internal clock pulses, act as a timer, or programmed to
count external events as a counter.
 Both Timer/Counters have four operating modes, Modes 0-3
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 85
 The counters are divided into two 8-bit registers called the timer low (TL0, TL1) and timer high
(TH0, TH1) bytes.
 Timers and counters are controlled by two sfr’s
 Mode control register (TMOD)
 Control register (TCON)
TMOD Register:
Fig 8 TMOD register format
 Gate: When set, timer only runs while INT (0, 1) is high.
 C/T: Counter/Timer select bit.
 M1: Mode bit 1.
 M0: Mode bit 0.
TCON Register:
Fig 9 TCON register format
• TF: Overflow flag
– Set by hardware on Timer/Counter overflow
– Cleared by hardware when processor vectors to interrupt routine
• TR: Run control bit
– Set/Cleared by software to turn Timer/Counter on/off
• IE: Interrupt Edge flag
– Set by hardware when external interrupt edge detected
– Cleared when interrupt processed
• IT: Interrupt Type control bit
– Set/Cleared by software to enable external interrupts
Interrupt Control
 Whenever any device needs its service, the device notifies the microcontroller by sending it an
interrupt signal.
 There are two ways of giving interrupts to a microcontroller – one is by sending software
instructions and the other is by sending hardware signals.
 There are total 5 interrupt sources in 8051 Microprocessor as follows.
a) 2 external interrupt sources connected through INT0 and INT1
b) 3 external interrupt sources- serial port interrupt, Timer Flag 0 and 1
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 86
Interrupt Enable Register
Each interrupt can be enabled or disabled by setting bits of the IE register.
 EA : Global enable/disable.
 --- : Undefined.
 ET2: Enable Timer 2 interrupt.
 ES : Enable Serial port interrupt.
Fig 10 IE register format
 ET1: Enable Timer 1 interrupt.
 EX1: Enable External 1 interrupt.
 ET0: Enable Timer 0 interrupt.
 EX0: Enable External 0 interrupt.
Serial Port
 Transmitting and receiving data bits is a serial connection network.
 There are 4 programmable modes (0-3) in serial data communication.
 Three registers associated with serial port
a. SBUF (Serial Port Data Buffer) register holds the data. The SBUF register has 2 parts – one for
storing the data to be transmitted and another for receiving data from outer sources.
b. SCON (Serial Control) register manages the data communication by selecting modes of operation
c. PCON (Power Control) register manages the data transfer rates.
SCON
Fig 11 SCON register format
SM0-SM1: Mode specifier
SM2: Used for multiprocessor Communication
REN: Receive enable
TB8 – RB8: not widely used
TI: Transmit interrupt flag
RI: Receive Interrupt flag
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 87
PCON
Fig 12 PCON register format
CPU Registers
• Used in assembler instructions
 A (Accumulator)
 B
 PSW (Program Status Word)
 SP (Stack Pointer)
 PC (Program Counter)
 DPTR (Data Pointer)
PSW (Program Status word) / Flag Register
Program Counter (PC)
 Is a 16-bit register and it has no internal address.
 PC increments automatically, holding the address of the next instruction.
Data Pointer (DPTR)
 Is a 16-bit register. It is made up of two 8-bit registers called DPH and DPL.
 These 8-bit registers are used for the storing the memory addresses that can be used to access
internal and external data/code.
Stack Pointer (SP)
 Is an 8-bit register. The main purpose of SP is to access the stack.
5.4 PIN DESCRIPTION OF 8051
 The 8051 is a 40 pin device, but out of these 40 pins, 32 are used for I/O.
 24 of these are dual purpose, i.e. they can operate as I/O or a control line or as part of address or
data bus.
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 88
Fig 13 8051 pin diagram
 Port 0 pins 32-39 :P0 P0.0~P0.7
 8-bit R/W - General Purpose I/O
 Or acts as a multiplexed low byte address and data bus for external memory design
 Port 1 pins 1-8 :P1 P1.0~P1.7
 Only 8-bit R/W - General Purpose I/O
 Port 2 pins 21-28 :P2 P2.0~P2.7
 8-bit R/W - General Purpose I/O
 Or high byte of the address bus for external memory design
 Port 3 pins 10-17 :P3 P3.0~P3.7
 General Purpose I/O
 if not using any of the internal peripherals (timers) or external interrupts.
 PSEN (out) pin 29: Program Store Enable, the read signal for external program memory (active
low).
 ALE (out) pin 30: Address Latch Enable, to latch address outputs at Port0 and Port2.
 EA (in) pin 31: External Access Enable, active low to access external program memory locations 0
to 4K .
 RXD,TXD: UART (pins10,11) for serial I/O on Port 3.
 XTAL1 & XTAL2 (pins 19,18): Crystal inputs for internal oscillator.
 Vcc pin 40 :provides supply voltage(+5) to the chip.
 GND pin 20 :ground
Addressing Modes
 There are 5 types of addressing modes:
1. Register addressing.
2. Direct addressing.
3. Register indirect addressing.
4. Immediate addressing.
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 89
5. Index addressing.
Register Addressing Mode
 The source and/or destination is a register.
 Data is placed in any of the 8 registers (R0-R7); in instructions it is specified with letter Rn (where N
indicates 0 to 7).
 For example;
1. ADD A, Rn
2. ADD A, R5 (This instruction will add the contents of register R5 with the accumulator contents).
Direct Addressing Mode
 The address of memory location containing data to be read is specified in instruction.
 Address of the data is given with the instruction itself.
 For example;
1. MOV A, 25H (This instruction will read/move the data from internal RAM address 25H and store it in the
accumulator.
Register Indirect Addressing Mode
 The contents of the designated register are used as a pointer to memory.
 In this case; data is placed in memory, but address of memory location is not given directly with instruction.
 For example;
1. MOV A,@R0 This instruction moves the data from the register whose address is in the R0 register into the
accumulator.
Immediate Addressing Mode
 The data is given with the instruction itself.
 The data to be stored in memory immediately follows the opcode.
 For example;
1. MOV A, #25H (This instruction will move the data 25H to accumulator.
Index Addressing Mode
 Offset (from accumulator) is added to the base index register (DPTR OR Program Counter) to form
the effective address of the memory location.
 For example;
1. MOVC A, @ A + DPTR ( This instruction moves the data from the memory to accumulator; whose
address is computed by adding the contents of accumulator and DPTR)
Types of Instructions
1. Data transfer instructions.
2. Arithmetic instructions.
3. Logical instructions.
4. Program and machine control instructions.
Arithmetic Instructions
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 90
Logic Instructions
MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17
Dept. of Computer Science And Applications, SJCET, Palai Page 91
Data Transfers
Program and machine control instructions.
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Module 5 embedded systems,8051

  • 1. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 79 5.1 EMBEDDED SYSTEM  An embedded system is a system has software embedded into computer-hardware, which makes a system dedicated for an application (s) or specific part of an application or product or part of a larger system. Fig 1 embedded system architecture 1. Embeds h/w to give computer like functionalities 2. Embeds application s/w generally into ROM and it perform concurrent tasks. 3. Embeds a RTOS, which supervises the system Functional Blocks 1. Central Processing Unit (CPU) 2. Memory (Read only memory and Random access memory) 3. Input Devices 4. Output Devices 5. Communication interfaces 6. Application specific circuitry Fig 2 block diagram of embedded system
  • 2. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 80 Classification of embedded system Fig 3 embedded system classification Based on functionality and performance requirements, embedded systems are classified as : i. Stand-alone Embedded Systems ii. Real-time Embedded Systems iii. Networked Information Appliances iv. Mobile Devices i. Stand Alone Embedded Systems  Work in stand-alone mode.  They take inputs, process them and produce the desired output.  Ex: mp3 players, digital cameras, video game consoles, microwave ovens and temperature measurement systems.. ii. Real-time Embedded Systems  Embedded systems in which some specific work has to be done in a specific time period are called real-time systems.  Two types Hard (with strict deadlines) and Soft iii. Networked Information Appliances  Embedded systems that are provided with network interfaces and accessed by networks such as Local Area Network or the Internet are called networked information appliances. iv. Mobile Devices  Mobile devices such as mobile phones, Personal Digital Assistants (PDAs), smart phones etc are a special category of embedded systems Based on performance of the micro controller embedded systems are classified as 1. Small Scale Embedded Systems  Are designed with a single 8 or 16-bit microcontroller, that may even be activated by a battery. 2. Medium Scale Embedded Systems  With a single or 16 or 32 bit microcontroller, RISCs or DSPs.  Have both hardware and software complexities. 3. Sophisticated Embedded Systems  Sophisticated Embedded Systems  have enormous hardware and software complexities,
  • 3. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 81 Applications 1. Biomedical Instrumentation – ECG Recorder, Blood cell recorder, patient monitor system. 2. Communication systems – pagers, cellular phones,etc. 3. Peripheral controllers of a computer – Keyboard controller, Printer controller, LAN controller, disk drive controller. 4. Industrial Instrumentation – Process controller, robotic systems etc. 5. Scientific – digital storage system, CRT display controller, spectrum analyzer. Device Driver  Device driver is a computer program those are integral components of operating systems.it allows higher- level computer programs to interact with a hardware device.  Each device driver handles  one device type (e.g., mouse)  one class of closely related devices. Fig 4 device driver location 5.2 MICROCONTROLLERS  Microcontrollers are small computing systems on a single chip.  A microcontroller will also be referred to as an MCU.  Central Processing Unit (CPU)  Program memory  Random Access Memory (RAM)  EEPROM - Electrically Erasable Programmable Read Only Memory  USARTs, Timer/Counters, ADC, DAC, I/O Ports.
  • 4. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 82 Microprocessor vs Microcontroller Applications of microcontrollers  Automobile  Aeronautics  Space  Rail Transport  Mobile communications  Industrial processing  Remote sensing , Radio and Networking  Robotics  Consumer electronics , music players, Computer applications  Security (e-commerce, smart cards)  Medical electronics (hospital equipment, and mobile monitoring) and  Defense application 5.3 8051 Features  4K bytes internal ROM  128 bytes internal RAM  Four 8-bit I/O ports (P0 - P3).  Two 16-bit timers/counters  One serial interface  64k external memory for code  64k external memory for data Fig 5 8051 block diagram Microprocessor  CPU is stand-alone, RAM, ROM, I/O, timer are separate  Designer can decide on the amount of ROM, RAM and I/O ports.  Expansive  general-purpose Microcontroller  CPU, RAM, ROM, I/O and timer are all on a single chip.  fix amount of on-chip ROM, RAM, I/O ports  For applications in which cost, power and space are critical.  single-purpose
  • 5. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 83 Oscillator Circuit  The oscillator circuit usually runs around 12MHz pulses generated by the crystal.  The pulse is used to synchronize the system operation in a controlled pace.  An 8051 machine cycle consists of 12 crystal pulses (clock cycle).  Pins XTAL1 & XTAL2 have been used. Internal Memory  8051 implements a separate memory space for programs (code) and data.  Internal memory consists of on-chip ROM and on-chip data RAM. Internal RAM  Internal data memory contains all the processor state  Lower 128 bytes: registers, general data  Upper 128 bytes:  indirectly addressed: 128 bytes, used for the stack  directly addressed: 128 bytes for “special” functions Fig 6 8051 internal RAM Registers  Four Register Banks Each bank has R0-R7 .Selectable by psw.2,3 Fig 7 8051 register banks and bank selection
  • 6. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 84 Special Function Registers  8051 has 7 special function registers (SFRs) Some are both bit-addressable and byte addressable, depending on the instruction accessing the register.  They are: 1. Serial Port Data Buffer (SBUF) 2. Timer/Counter Control (TCON) 3. Timer/Counter Mode Control (TMOD) 4. Serial Port Control (SCON) 5. Power Control (PCON) 6. Interrupt Priority (IP) 7. Interrupt Enable Control (IE) I/O Ports  Four 8 bit bidirectional I/O ports. Each port has an 8-bit latch in the SFR space  Each port also has an output drive and an input buffer.  These ports can be used to general purpose I/O, as an address and data lines. Port 0  When there is no external memory present, this port acts as a general purpose input/output port.  In the presence of external memory, it functions as a multiplexed address and data bus. Port 1  No dual functions.  Is used for various interfacing activities.  Is a normal I/O port . Port 2  This is an 8-bit port and performs dual functions.  Similar to PORT P0, this port can be used as a general purpose port when there is no external memory.  When external memory is present it works in conjunction with PORT PO as an address bus. Port 3  behaves as a dedicated I/O port  0 - RxD: serial input  1 - TxD: serial output  2 - INT0: external interrupt  3 - INT1: external interrupt  4 - T0: timer/counter 0 external input  5 - T1: timer/counter 1 external input  6 - WR: external data memory write strobe  7 - RD: external data memory read strobe Timers and Counters  Two 16-bit registers that can be used as either timers or up counters are named T0 and T1.  Each counter may be programmed to count internal clock pulses, act as a timer, or programmed to count external events as a counter.  Both Timer/Counters have four operating modes, Modes 0-3
  • 7. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 85  The counters are divided into two 8-bit registers called the timer low (TL0, TL1) and timer high (TH0, TH1) bytes.  Timers and counters are controlled by two sfr’s  Mode control register (TMOD)  Control register (TCON) TMOD Register: Fig 8 TMOD register format  Gate: When set, timer only runs while INT (0, 1) is high.  C/T: Counter/Timer select bit.  M1: Mode bit 1.  M0: Mode bit 0. TCON Register: Fig 9 TCON register format • TF: Overflow flag – Set by hardware on Timer/Counter overflow – Cleared by hardware when processor vectors to interrupt routine • TR: Run control bit – Set/Cleared by software to turn Timer/Counter on/off • IE: Interrupt Edge flag – Set by hardware when external interrupt edge detected – Cleared when interrupt processed • IT: Interrupt Type control bit – Set/Cleared by software to enable external interrupts Interrupt Control  Whenever any device needs its service, the device notifies the microcontroller by sending it an interrupt signal.  There are two ways of giving interrupts to a microcontroller – one is by sending software instructions and the other is by sending hardware signals.  There are total 5 interrupt sources in 8051 Microprocessor as follows. a) 2 external interrupt sources connected through INT0 and INT1 b) 3 external interrupt sources- serial port interrupt, Timer Flag 0 and 1
  • 8. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 86 Interrupt Enable Register Each interrupt can be enabled or disabled by setting bits of the IE register.  EA : Global enable/disable.  --- : Undefined.  ET2: Enable Timer 2 interrupt.  ES : Enable Serial port interrupt. Fig 10 IE register format  ET1: Enable Timer 1 interrupt.  EX1: Enable External 1 interrupt.  ET0: Enable Timer 0 interrupt.  EX0: Enable External 0 interrupt. Serial Port  Transmitting and receiving data bits is a serial connection network.  There are 4 programmable modes (0-3) in serial data communication.  Three registers associated with serial port a. SBUF (Serial Port Data Buffer) register holds the data. The SBUF register has 2 parts – one for storing the data to be transmitted and another for receiving data from outer sources. b. SCON (Serial Control) register manages the data communication by selecting modes of operation c. PCON (Power Control) register manages the data transfer rates. SCON Fig 11 SCON register format SM0-SM1: Mode specifier SM2: Used for multiprocessor Communication REN: Receive enable TB8 – RB8: not widely used TI: Transmit interrupt flag RI: Receive Interrupt flag
  • 9. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 87 PCON Fig 12 PCON register format CPU Registers • Used in assembler instructions  A (Accumulator)  B  PSW (Program Status Word)  SP (Stack Pointer)  PC (Program Counter)  DPTR (Data Pointer) PSW (Program Status word) / Flag Register Program Counter (PC)  Is a 16-bit register and it has no internal address.  PC increments automatically, holding the address of the next instruction. Data Pointer (DPTR)  Is a 16-bit register. It is made up of two 8-bit registers called DPH and DPL.  These 8-bit registers are used for the storing the memory addresses that can be used to access internal and external data/code. Stack Pointer (SP)  Is an 8-bit register. The main purpose of SP is to access the stack. 5.4 PIN DESCRIPTION OF 8051  The 8051 is a 40 pin device, but out of these 40 pins, 32 are used for I/O.  24 of these are dual purpose, i.e. they can operate as I/O or a control line or as part of address or data bus.
  • 10. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 88 Fig 13 8051 pin diagram  Port 0 pins 32-39 :P0 P0.0~P0.7  8-bit R/W - General Purpose I/O  Or acts as a multiplexed low byte address and data bus for external memory design  Port 1 pins 1-8 :P1 P1.0~P1.7  Only 8-bit R/W - General Purpose I/O  Port 2 pins 21-28 :P2 P2.0~P2.7  8-bit R/W - General Purpose I/O  Or high byte of the address bus for external memory design  Port 3 pins 10-17 :P3 P3.0~P3.7  General Purpose I/O  if not using any of the internal peripherals (timers) or external interrupts.  PSEN (out) pin 29: Program Store Enable, the read signal for external program memory (active low).  ALE (out) pin 30: Address Latch Enable, to latch address outputs at Port0 and Port2.  EA (in) pin 31: External Access Enable, active low to access external program memory locations 0 to 4K .  RXD,TXD: UART (pins10,11) for serial I/O on Port 3.  XTAL1 & XTAL2 (pins 19,18): Crystal inputs for internal oscillator.  Vcc pin 40 :provides supply voltage(+5) to the chip.  GND pin 20 :ground Addressing Modes  There are 5 types of addressing modes: 1. Register addressing. 2. Direct addressing. 3. Register indirect addressing. 4. Immediate addressing.
  • 11. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 89 5. Index addressing. Register Addressing Mode  The source and/or destination is a register.  Data is placed in any of the 8 registers (R0-R7); in instructions it is specified with letter Rn (where N indicates 0 to 7).  For example; 1. ADD A, Rn 2. ADD A, R5 (This instruction will add the contents of register R5 with the accumulator contents). Direct Addressing Mode  The address of memory location containing data to be read is specified in instruction.  Address of the data is given with the instruction itself.  For example; 1. MOV A, 25H (This instruction will read/move the data from internal RAM address 25H and store it in the accumulator. Register Indirect Addressing Mode  The contents of the designated register are used as a pointer to memory.  In this case; data is placed in memory, but address of memory location is not given directly with instruction.  For example; 1. MOV A,@R0 This instruction moves the data from the register whose address is in the R0 register into the accumulator. Immediate Addressing Mode  The data is given with the instruction itself.  The data to be stored in memory immediately follows the opcode.  For example; 1. MOV A, #25H (This instruction will move the data 25H to accumulator. Index Addressing Mode  Offset (from accumulator) is added to the base index register (DPTR OR Program Counter) to form the effective address of the memory location.  For example; 1. MOVC A, @ A + DPTR ( This instruction moves the data from the memory to accumulator; whose address is computed by adding the contents of accumulator and DPTR) Types of Instructions 1. Data transfer instructions. 2. Arithmetic instructions. 3. Logical instructions. 4. Program and machine control instructions. Arithmetic Instructions
  • 12. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 90 Logic Instructions
  • 13. MODULE 5 MCA-203 MICROPROCESSORS AND EMBEDDED SYSTEM ADMN 2014-‘17 Dept. of Computer Science And Applications, SJCET, Palai Page 91 Data Transfers Program and machine control instructions.
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