RISC (reduced instruction set computer)

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RISC Reduced Instruction Set Computer What Is RISC? History Of RISC. Characteristics Of RISC. Five Design Principles Of RISC. What Actually RISC Does? In Real Life Uses Of RISC In Computer Architecture. Computer Architecture & Organization.

Presented By:
Md. Arman Hossean: 141-35-642
Presented To:
Sheikh Shah Mohammad Motiur Rahman
Lecturer, Dept. of SWE
Daffodil International University
2

My Presentation Topic Is:
RISC (Reduced Instruction Set Computer)
3

RISC is a type of microprocessor architecture that utilizes a small,
highly-optimized set of instructions, rather than a more specialized
set of instructions often found in other types of architectures.
WHAT
IS
RISC???
4

History Of RISC:
1. RISC approach developed as a result of development in
1970’s.
2. Increase in memory size.
3. Decrease in cost.
4. Advanced compilers.
5. In late 1970’s IBM was the first to start.
6. In 1980 , David Patterson ,began the project that gives
this approach RISC.
5

Characteristics Of RISC:
Simplified instructions , taking 1 clock cycle.
Large no. of general purpose registers.
Circuit is much simpler.
Fast to decode.
Fast to execute.
Pipelining- fetching of next instruction while
previous instruction executes.
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RISC Has Five Design Principles:
•Simple Instructions:
The objective is to design simple instruction so that
each can execute in one cycle.
•Register-to-Register Operations:
RISC processors only allow LOAD/STORE operations
to access memory. Rest of the operations work on
the register-to-register basis. This feature of
restricting operands to registers also simplifies the
control-unit.
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•Simple Addressing Modes:
RISC processors employ register-to-register instruction so
most instruction use register based addressing.
Only LOAD/STORE instructions need memory addressing
modes.
•Large Register Set:
For register-to-register operation large number of
registers required.
Provide ample opportunities for the compiler to optimize
their usage.
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•Fixed-Length:
RISC design use fixed-length instructions. Variable
length instructions cause implementation and
execution inefficient.
The boundaries of various fields in an instruction such
as opcode and source operands are fixed. This allows
efficient decoding and scheduling of instructions.
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What Actually RISC Does?
 Break Operation into Simple Sub-Operation.
Example:-
Load X, Load Y,
add X and Y,
Store on Z
X * Y → Z
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In Real Life Use of RISC Architectures:
 RISC architectures are now used across a wide range of
platforms, from cellular telephones and tablet computers.
 Intel was able to spend vast amounts of money on
processor development to offset the RISC advantages enough
to maintain PC market share.
 New microprocessors can be developed and tested more
quickly if being less complicated is one of it’s aims.
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RISC (reduced instruction set computer)

1. Welcome To My Presentation 1

2. Presented By: Md. Arman Hossean: 141-35-642 Presented To: Sheikh Shah Mohammad Motiur Rahman Lecturer, Dept. of SWE Daffodil International University 2

3. My Presentation Topic Is: RISC (Reduced Instruction Set Computer) 3

4. RISC is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures. WHAT IS RISC??? 4

5. History Of RISC: 1. RISC approach developed as a result of development in 1970’s. 2. Increase in memory size. 3. Decrease in cost. 4. Advanced compilers. 5. In late 1970’s IBM was the first to start. 6. In 1980 , David Patterson ,began the project that gives this approach RISC. 5

6. Characteristics Of RISC: Simplified instructions , taking 1 clock cycle. Large no. of general purpose registers. Circuit is much simpler. Fast to decode. Fast to execute. Pipelining- fetching of next instruction while previous instruction executes. 6

7. RISC Has Five Design Principles: •Simple Instructions: The objective is to design simple instruction so that each can execute in one cycle. •Register-to-Register Operations: RISC processors only allow LOAD/STORE operations to access memory. Rest of the operations work on the register-to-register basis. This feature of restricting operands to registers also simplifies the control-unit. 7

8. •Simple Addressing Modes: RISC processors employ register-to-register instruction so most instruction use register based addressing. Only LOAD/STORE instructions need memory addressing modes. •Large Register Set: For register-to-register operation large number of registers required. Provide ample opportunities for the compiler to optimize their usage. 8

9. •Fixed-Length: RISC design use fixed-length instructions. Variable length instructions cause implementation and execution inefficient. The boundaries of various fields in an instruction such as opcode and source operands are fixed. This allows efficient decoding and scheduling of instructions. 9

10. What Actually RISC Does?  Break Operation into Simple Sub-Operation. Example:- Load X, Load Y, add X and Y, Store on Z X * Y → Z 10

11. In Real Life Use of RISC Architectures:  RISC architectures are now used across a wide range of platforms, from cellular telephones and tablet computers.  Intel was able to spend vast amounts of money on processor development to offset the RISC advantages enough to maintain PC market share.  New microprocessors can be developed and tested more quickly if being less complicated is one of it’s aims. 11

12. Thank You!  12

RISC (reduced instruction set computer)

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RISC (reduced instruction set computer)