Mux based array mul ppt
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This document describes the implementation of an 8-bit multiplexer based array multiplier. It includes circuit diagrams and details of the cell-level implementation using 4x1 multiplexers and full adders. Simulation results are shown for a 4-bit and 8-bit version in Xilinx and Microwind tools, verifying the output. Applications of this multiplexer based array multiplier include ALUs, DSPs, and high performance algorithms. The design can be expanded to larger bit widths and using faster adder circuits.
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Mux based array mul ppt
- 1. IMPLEMENTATION OF 8-BIT MULTIPLEXER BASED ARRAY MULTIPLIER K.SUSHMA(709212142027) B.GAYATRI(709212142008)
- 2. INTRODUCTION Parallel multiplier Extension of an array multiplier One bit of the multiplier and one bit of the multiplicand are processed in parallel
- 3. CIRCUIT DIAGRAM OF 5-BIT MUX-BASED ARR AY MULTIPLIER
- 4. CELL-1 MUX BASED MULTIPLIER IMPLEMENTATION
- 5. DETAILS OF CELL-I 4X1 Multiplexer Full-Adder
- 6. CELL-1I MUX BASED MULTIPLIER IMPLEMENTATION
- 7. DETAILS OF CELL-II Full-Adder And gates
- 8. TOP MODEL VIEW OF 8-BIT MUX-BASED ARRAY MULTIPLIER
- 9. SIMULATED WAVE FORM FOR 8-BIT USING XILINX 12.1i
- 10. 4-BIT MUX BASED ARRAY MULTIPLIER MASK LAYOUT USING MICROWIND LAYOUT EDITOR
- 11. SIMULATED OUTPUT WAVE FORM USING MICROWIND LAYOUT EDITOR
- 12. 4-BIT MUX-BASED ARRAY MULTIPLIER MASK LAYOUT USING I/0 PADS
- 13. APPLICATIONS ALU DSP High performance algorithms
- 14. SCOPE OF EXPANSION Rectangular form Using fast adders
- 15. THANK YOU