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8051-Introduction, Programming, Interfacing
- 1. 8051 (MICROCONTROLLER) Nitin Ahire XIE, Mahim Prof. Nitin Ahire 1
- 2. MICROCONTROLLER What is a microcontroller ? Basically a device which integrates a number of components of a microprocessor system on to a single chip, only need to supplied power and clocking. Microcontroller combines on the same chip 1) The CPU core 2) I/O Ports 3) Memory 4) Timer Prof. Nitin Ahire 2
- 3. HISTORY In 1981, Intel Corporation introduced an 8 bit microcontroller called 8051. It was also referred to as “ system on chip” The 8051 is the original member of MCS-51 family Other members of 8051 8031, 8052, 8751, AT89C51, etc Prof. Nitin Ahire 3
- 4. Prof. Nitin Ahire 4 Microprocessor CPU is stand-alone, RAM, ROM, I/O, timer are separate Designer can decide on the amount of ROM, RAM and I/O ports. Expansive General-purpose Microcontroller • CPU, RAM, ROM, I/O and timer are all on a single chip • Fix amount of on-chip ROM, RAM, I/O ports • For applications in which cost, power and space are critical • Single-purpose Microprocessor vs. Microcontroller
- 5. CHOOSING A MICROCONTROLLER Computing needs Speed, packaging, power consumption, RAM, ROM, I/O pins, timers, upgrade to high performance or low-power versions, cost etc Software development tools Assembler, debugger, C compiler, technical support Availability source Prof. Nitin Ahire 5
- 6. Prof. Nitin Ahire 6 Microcontroller vs. Microcontroller vs. Microprocessors Microprocessors
- 7. Prof. Nitin Ahire 7 An embedded product uses a microcontroller (microprocessor) to do one (single) task only. Embedded system means the processor is embedded into that application. In an embedded system, there is only one application software that is typically burned into ROM. Example：printer, keyboard, video game player Embedded System
- 8. COMPANIES PRODUCING 8051 Table :Some Companies Producing a Member of Table :Some Companies Producing a Member of Table :Some Companies Producing a Member of Table :Some Companies Producing a Member of the 8051 Family the 8051 Family the 8051 Family the 8051 Family Company Web Site Intel www.intel.com/design/mcs51 Atmel www.atmel.com Philips/Signetics www.semiconductors.philips.com Siemens www.sci.siemens.com Dallas Semiconductor www.dalsemi.com 8 Prof. Nitin Ahire
- 9. 8051 FAMILY Table :Comparison of 8051 Family Members Table :Comparison of 8051 Family Members Table :Comparison of 8051 Family Members Table :Comparison of 8051 Family Members Prof. Nitin Ahire 9 Feature Feature 8051 8051 8052 8052 8031 8031 ROM (on chip program space in bytes) ROM (on chip program space in bytes) 4K 4K 8K 8K 0K 0K RAM (bytes) RAM (bytes) 128 128 256 256 128 128 Timers Timers 2 2 3 3 2 2 I/O pins I/O pins 32 32 32 32 32 32 Serial port Serial port 1 1 1 1 1 1 Interrupt sources Interrupt sources 6 6 8 8 6 6
- 10. VARIOUS 8051 MICROCONTROLLERS 8031 microcontroller (ROM -Less) 8751 microcontroller UV-EPROM (20 minutes) AT89C51 from Atmel Corporation Flash (erase before write) DS5000 from Dallas Semiconductor NV-RAM (changed one byte at a time), RTC (real-time clock) OTP (one-time-programmable) version of 8051 8051 family from Philips AD, DA, extended I/O, OTP and flash Prof. Nitin Ahire 10
- 11. MAJOR 8-BIT MICROCONTROLLERS. They are : 1)Motorola’s 6811, 2)Intel’s 8051, 3)Zilog Z8, and 4)PIC 16X from Microchip Technology. Each of the above microcontrollers has unique instruction set and register set; there fore they are not compatible with each other. Program written for one will not run on the others Prof. Nitin Ahire 11
- 12. FEATURE OF 8051 The 8051 is 8 – bit microcontroller. There are 16 bit -address lines and 8 –bit data lines. On chip Program memory ROM 4 KB On chip Data memory RAM 128 byte 32 bidirectional I/O lines arranged as four 8-bit port ( port 0 – port 3) 2- sixteen bit Timer/Counter ( Timer 0 and Timer 1) Four register Banks ( Bank 0- Bank 3) Direct bit and byte addressability Prof. Nitin Ahire 12
- 13. INSIDE 8051 MICROCONTROLLER Introduced by Intel in 1981 13 Prof. Nitin Ahire
- 15. ARCHITECTURE OF 8051 Accumulator : It is an 8 – bit register used for arithmetic and logical operation to accumulate the result. Several function like rotate, swap etc apply on the accumulator B register: It is use with A register for multiplication and division for other instruction it is treated as scratch pad register. Prof. Nitin Ahire 15
- 16. ARCHITECTURE OF 8051 ALU : The ALU can perform arithmetic and logical operation on 8-bit data. Like add, sub, mul, div or AND or OR ,compliment, etc. Program counter (PC) : It is a 16 –bit register. It is used to hold the address of an instruction (program) stored in the memory. Program status word ( PSW ): Many instruction affect the status flags in order to address these flags conveniently they can be grouped to from PSW Prof. Nitin Ahire 16
- 17. 8051 FLAG BITS PSW (Program status word) register It is an 8-bit register It is a bit addressable register CY- Carry flag PSW.7 AC- Auxiliary carry PSW.6 FO – Available to the user for general purpose RS0-RS1- Register Bank selector (PSW.3, PSW.4) Prof. Nitin Ahire 17 CY AC - OV RS0 RS1 FO P
- 18. 8051 FLAG BITS OV- overflow Flag PSW.2 P- Parity Flag PSW.0 RS1 RS0 Register Bank Address 0 0 Bank 0 00h-07h 0 1 Bank 1 08h- 0fh 1 0 Bank2 10h-17h 1 1 Bank3 18h-1Fh Prof. Nitin Ahire 18
- 19. 8051 FLAG BITS CY- This flag is set whenever there is carry from d7 bit. This flag bit is affected after addition or subtraction. It can also set 1 or 0 directly by instruction such as “SETB C” and “ CLR C” AC- If there is carry from D3 to D4 during an ADD or SUB operation, this bit is set; otherwise it is cleared ( used in BCD arithmetic) P – The Parity Flag reflects the number of 1s in the A ( accumulator) . If A contains odd number of 1s, then P=1 and A contains even number of 1s, then P=0 Prof. Nitin Ahire 19
- 20. 8051 FLAG BITS OV – this flag is set whenever the result of singed number operation is too large, causing the high-order bit to overflow into the sign bit ( It is used only in signed operation) Prof. Nitin Ahire 20
- 21. 8051 REGISTER BANKS AND STACK The 8051 has a total 128 bytes of RAM. The 128 bytes of RAM in side the 8051 are assigned address 00 to 7Fh. The 128 bytes are divided into three different groups as follows 1) A total of 32 32 32 32 bytes from locations 00 to 1F 00 to 1F 00 to 1F 00 to 1F hex are set aside for register banks and the stack. 2) A total of 16 16 16 16 bytes from locations 20h to 2Fh 20h to 2Fh 20h to 2Fh 20h to 2Fh are aside for bit addressable read/write memory 3) A total 80 80 80 80 bytes from location 30h to 7Fh 30h to 7Fh 30h to 7Fh 30h to 7Fh are used for read and write storage normally called ‘scratch pad’ RAM Prof. Nitin Ahire 21
- 22. RAM memory space allocation in the RAM memory space allocation in the RAM memory space allocation in the RAM memory space allocation in the 8051 8051 8051 8051 Prof. Nitin Ahire 22 7FH 30H 2FH 20H 1FH 17H 10H 0FH 07H 08H 18H 00H Register Bank 0 Register Bank 1 Register Bank 2 Register Bank 3 Bit-Addressable RAM Scratch pad RAM
- 23. Prof. Nitin Ahire 23 Bank 0 Bank 2 Bank 1 Bank 3 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 78 79 7A 7B 7C 7D 7E 7F 00 1F 20 2F 30 7F 4 Reg. BANK 8 bytes each 32 bytes Bit addressable RAM 16 bytes ( 80 bits) General purpose RAM 80 bytes Internal RAM memory organization
- 24. REGISTER BANKS IN 8051 The 32 bytes of RAM are divided into 4 banks of register in which each bank has 8 registers, R0-R7. Bank 0 Bank 1 Bank 2 Bank3 Prof. Nitin Ahire 24 R7 R6 R5 R4 R3 R2 R1 R0 R7 R6 R5 R4 R3 R2 R1 R0 R7 R6 R5 R4 R3 R2 R1 R0 R7 R6 R5 R4 R3 R2 R1 R0
- 25. STACK IN THE 8051 The register used to access the stack is called SP (stack pointer) register. The stack pointer in the 8051 is only 8 bits wide, which means that it can take value 00 to FFH. When 8051 powered up, the SP register contains value 07. Prof. Nitin Ahire 25 7FH 30H 2FH 20H 1FH 17H 10H 0FH 07H 08H 18H 00H Register Bank 0 (Stack) Register Bank 1 Register Bank 2 Register Bank 3 Bit-Addressable RAM Scratch pad RAM
- 26. ARCHITECTURE OF 8051 DPTR: The data pointer is 16 bit register It is used to hold the address of data in the memory. It can be accessed separately as lower 8 bit (DPL) and higher 8 bit (DPH) The DPTR does not have a single internal address instead DPH and DPL are each assigned a separate address. Prof. Nitin Ahire 26
- 27. ARCHITECTURE OF 8051 Stack and Stack Pointer : The stack is the reserved area of the memory in the RAM where temporary information may be stored. an 8 – bit stack pointer is used to hold the address of most recent stack entry. Generally it is called top of the stack It work on LIFO or FILO principle By default location of stack pointer is 07h we can change the default location by MOV SP,# XX h ( RAM location 30h – 7Fh) Prof. Nitin Ahire 27
- 28. ARCHITECTURE OF 8051 SFR (Special Function Registers) : SFR registers are placed in the address space immediately above the 128 bytes of RAM, from address 80h to FF h The SFR memory consists of important registers like A,B,PSW,PCON,TCON,TMOD etc some registers are bit addressable while remaining are byte addressable. Prof. Nitin Ahire 28
- 29. SFR (SPECIAL FUNCTION REGISTERS) Prof. Nitin Ahire 29
- 30. ARCHITECTURE OF 8051 Some of the address i.e. locations in between 80h to FF h are not used if we try to used, then we may get the unpredictable result like data lost The PC is not the part of SFR the PC does not have an internal RAM address. Prof. Nitin Ahire 30
- 31. Prof. Nitin Ahire 31 A 80 81 82 87 90 FF F0 E0 83 B P0 SP DPL DPH PCON P1 PSW D0 Address SFR Registers d7d5 d5 d4 d3 d2 d1d0 d7d5 d5 d4 d3 d2 d1d0
- 32. HOW STACK ARE ACCESSED IN THE 8051 Pushing data on to the stack Show the stack and stack pointer for the following Assume default stack area MOV R6,#25H ; copy number 25 in R6 MOV R1,#12H ; copy number 12 in R1 MOV R4,#0F3H ; copy number F3 in R4 PUSH 6 PUSH 1 PUSH 4 Prof. Nitin Ahire 32
- 33. PUSH POP Solution: Prof. Nitin Ahire 33 08 09 0A 0B Start SP = 07 25 08 09 0A 0B SP = 08 25 12 08 09 0A 0B SP = 09 25 F3 12 08 09 0A 0B SP = 0A After PUSH 6 After PUSH 1 After PUSH 4
- 34. PUSH POP Popping from the stack Examining the stack, show the content of the registers and SP after execution of the following instruction POP 3 ; POP stack into R3 POP 5 ; POP stack into R5 POP 2 ;POP stack into R2 Prof. Nitin Ahire 34
- 35. PUSH POP Solutions Prof. Nitin Ahire 35 6C 54 F9 76 08 09 0A 0B Start SP = 0B 6C F9 76 08 09 0A 0B SP = 0A 6C 76 08 09 0A 0B SP = 09 6C 08 09 0A 0B SP = 08 R3=54 After POP 5 After POP 2 After POP 3 R5=F9 R2=76
- 36. PIN DESCRIPTION OF THE 8051 8051 family members come in different package, such as DIP (dual in line package), QFP (quad flat package), and LLC (leadless chip carrier) Some companies provide a 20 pin version of 8051 with reduced numbers of I/O ports Majority of developers use the 40-pin DIP package chip. Prof. Nitin Ahire 36
- 37. Prof. Nitin Ahire 37 Pin Description of the Pin Description of the 8051 8051 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (T0)P3.4 (T1)P3.5 XTAL2 XTAL1 GND (INT0)P3.2 (INT1)P3.3 (RD)P3.7 (WR)P3.6 Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8) 8051 (8031)
- 38. Prof. Nitin Ahire 38 Figure (a). XTAL Connection to Figure (a). XTAL Connection to 8051 8051 C2 30pF C1 30pF XTAL2 XTAL1 GND Using a quartz crystal oscillator ( operating freq range 1MHZ to 16 MHZ ) We can observe the frequency on the XTAL2 pin.
- 39. PINS OF 8051（2/4） RST（pin 9） Reset It is an input pin and is active high（ normally low） The high pulse must be high at least 2 machine cycles. If crystal freq=16 Mhz then find the machine cycle sol: 16MHz/12=1.33MHz MC = 1/ 1.33Mhz =0.75 microsec If crystal freq=11.0592 Mhz then find the machine cycle sol: 11.0592MHz/12=921.6KHz MC = 1/ 921.6Khz =1.085 microsec Time to execute one cycle instruction e.g. ADD A,R1 Prof. Nitin Ahire 39
- 40. It is a power-on reset. Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. Reset values of some 8051 registers Prof. Nitin Ahire 40
- 41. Register Register Reset value Reset value PC PC 0000 0000 ACC ACC 00 00 B B 00 00 PSW PSW 00 00 SP SP 07 07 DTPR DTPR 0000 0000 41 Prof. Nitin Ahire
- 42. FIGURE. RESET WITH DEBOUNCE CIRCUIT Prof. Nitin Ahire 42 30 pF 30 pF 8.2 K 10 uF + Vcc 11.0592 MHz EA/VPP X1 X2 RST 31 19 18 9
- 43. PINS OF 8051（3/4） /EA pin 31）external access There is no on-chip ROM in 8031 and 8032 . The /EA pin is connected to GND to indicate the code is stored externally. For 8051, /EA pin is connected to Vcc. “/” means active low. /PSEN（pin 29） program store enable This is an output pin and is connected to the OE pin of the external ROM. Prof. Nitin Ahire 43
- 44. PINS OF 8051（4/4） ALE（pin 30）：address latch enable It is an output pin and is active high. 8051 port 0 provides both address and data. The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. I/O port pins The four ports P0, P1, P2, and P3. Each port uses 8 pins. All I/O pins are bi-directional. . Prof. Nitin Ahire 44
- 45. PINS OF I/O PORT The 8051 has four I/O ports Port 0 （pins 32-39） ：P0（P0.0～ to P0.7） Port 1（pins 1-8） ：P1（P1.0～ to P1.7） Port 2（pins 21-28） ：P2（P2.0～ to P2.7） Port 3（pins 10-17） ：P3（P3.0～ to P3.7） Each port has 8 pins. Named P0.X （X=0,1,...,7）, P1.X, P2.X, P3.X P0.0 is the bit 0（LSB）of P0 P0.7 is the bit 7（MSB）of P0 These 8 bits form a byte. Each port can be used as input or output (bi-direction). Prof. Nitin Ahire 45
- 46. Prof. Nitin Ahire 46 A Pin of Port A Pin of Port 0 0 8051 IC D Q Clk Q Read latch Read pin Write to latch Internal CPU bus M1 P0.X pin P1.X TB1 TB2 P1.x
- 47. PORT 0 WITH PULL-UP RESISTORS Prof. Nitin Ahire 47 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 DS5000 8751 8951 Vcc 10 K Port 0
- 48. PORT 3 ALTERNATE FUNCTIONS Prof. Nitin Ahire 48 17 17 RD RD P P3 3. .7 7 16 16 WR WR P P3 3. .6 6 15 15 T T1 1 P P3 3. .5 5 14 14 T T0 0 P P3 3. .4 4 13 13 INT INT1 1 P P3 3. .3 3 12 12 INT INT0 0 P3.2 P3.2 11 11 TxD TxD P P3 3. .1 1 10 10 RxD RxD P P3 3. .0 0 Pin Pin Function Function P P3 3 Bit Bit