#1 What is DRAM IO? Which one is better schematic for DRAM IO & EQ?

This is a simple article about DRAM IO to inspire or discuss for the next research. This may contain incorrect informs or even controversial sides of material.

So, it is welcome and open to discuss anytime.

1. DRAM IO schematic features

▪ DRAM interface schematics have those features.

• Source-synchronous system
• Single-ended channel for data
• Strobe signal for data sample

▪ Data come and go through single-ended channel and strobe signal along together. And it is source-synchronous, so CMD Clock & Strobe are totally controlled by controller. That means it is not necessary for a clock generation unit in DRAM additionally.

▪ If system has enough margins for the pin skew variation, then even possible to go without DLL. But usually module with multi-ranks system are needed something to compensate multi-tab channel degradation and it is the reason DRAM equipped with DLL.

▪ DRAM – Controller channel architecture

▪ DRAM Tx / Rx / Channel (LP4X, LVSTL signal)

2. DRAM Equalizer schematic – DFE (Decision feedback equalizer)

▪ DRAM is not good device to use DFE (Decision feedback equalizer) because of those reasons.

• Single-ended channel is not suitable for differential type equalizer like DFE.
• And also source synchronous system clocking is a negative point for DRAM self clocking. That means DRAM generated clock always stays in aligned to the system clock.
• Actually Data / Clock / Strobe those should stay in aligned to system.

▪ And there are also minor reasons. Most of all, channel speed is not so fast to equip DFE to compensate ISI noise.

Of course, DRAM data pass through multi-stub channel and data will suffer noise situation, but still DDR4 has 3200Mbps channel speed with tight budget of chip size and total power consumption.

▪ Even though, you decide to equip DFE in DRAM Rx, then there is must have item for DFE. It is data decision unit which runs with aligned data clock.

I have checked some company acclaimed DFE schematic with no clocking decision unit, but my opinion is DFE without decision unit, that is just feed-back system.

▪ DRAM DFE Diagram #1

▪ Of course feed-back is good for frequency response, but it works only same phase aligning. If someone acclaims feed-back after fully developed rail to rail signal is also effective to frequency..

▪ My opinion is not sure of its necessity to use. Because signal developed through many stages until rail to rail, so it has some propagation delay which varies signal by signal, temperature and corners.

▪ DRAM DFE Diagram #2