inria-00259944, version 1
A Schedulerless Semantics of TLM Models Written in SystemC via Translation into LOTOS
Olivier Ponsini 1Wendelin Serwe 1
Formal Methods (2008)
Résumé : TLM (Transaction-Level Modeling) was introduced to cope with the increasing complexity of Systems-on-Chip designs by raising the modeling level. Currently, TLM is primarily used for system-level functional testing and simulation using the SystemC C++ API widely accepted in industry. Nevertheless, TLM requires a careful handling of asynchronous concurrency. In this paper, we give a semantics to TLM models written in SystemC via a translation into the process algebra LOTOS, enabling the verification of the models with the CADP toolbox dedicated to asynchronous systems. Contrary to other works on formal verification of TLM models written in SystemC, our approach targets fully asynchronous TLM without the restrictions imposed by the SystemC simulation semantics. We argue that this approach leads to more dependable models.
- 1 : VASY (INRIA Grenoble Rhône-Alpes / LIG Laboratoire d'Informatique de Grenoble)
- INRIA – Institut polytechnique de Grenoble (Grenoble INP) – Université Joseph Fourier - Grenoble I – Université Pierre-Mendès-France - Grenoble II – CNRS : UMR5217
- Domaine : Informatique/Informatique et langage
Informatique/Systèmes embarqués
Informatique/Modélisation et simulation
Informatique/Langage de programmation
Informatique/Génie logiciel
- inria-00259944, version 1
- http://hal.inria.fr/inria-00259944
- oai:hal.inria.fr:inria-00259944
- Contributeur : Wendelin Serwe
- Soumis le : Vendredi 29 Février 2008, 18:10:53
- Dernière modification le : Lundi 3 Mars 2008, 17:58:56